In many Radio Frequency (RF) applications, the Phase Noise of a Local Oscillator (LO) clock source is a key concern in designing the system. For example, in a typical Quadrature RF Receiver, the RF signal is received by an antenna, amplified by a Low-Noise Amplifier (LNA), and then down-converted from RF to an Intermediate Frequency (IF) or Baseband (BB, sometimes also known as “Zero-IF” or ZIF) by mixing the output from the LNA with two versions of a Local Oscillator clock source using two mixers. One copy of the LO clock source is shifted by a quarter phase. The outputs from the mixers are then filtered by two Low-Pass Filters (LPFs) for further processing. A Quadrature RF Transmitter is qualitatively similar, but operates in reverse, with two BB/IF signals being up-converted to RF using two mixers, summed together, and finally amplified by a Power Amplifier (PA) for transmission over the antenna.
RF systems can take various forms, and the details of their construction are beyond the scope of this document, however almost all structures involve mixing signals with LO clock sources to convert BB/IF signals to RF or vice versa. There are many possible mixer structures, and the details of their construction are also beyond the scope of this document, however at their core they can all be modeled as analog multipliers. Applying two sinusoidal inputs to an analog multiplier:i1=cos(2·π·f1·t), i2=cos(2·π·f2·t)  (Equation 1)Results in:i1·i2=cos(2·π·f1·t)·cos(2·π·f2·t)=½·(cos(2·π·(f1+f2)·t)+cos(2·π·(f1−f2)·t))  (Equation 2)
In other words, the act of multiplying two pure sinusoids results in two other sinusoids, one at the “sum” frequency (i.e. f1+f2), the other at the “difference” frequency (i.e. f1−f2). In many RF applications, typically one of these two frequencies is desired while the other (known as the “image”) is not and is rejected at the output, using a Low-Pass Filter, trigonometric identities or some other means.
FIGS. 1A and 1B respectively show the Power Spectral Density (PSD) of one possible frequency plan for a single-frequency Receive RF system, and the effect of LO Phase Noise at the output. Before the mixer, as shown in FIG. 1A, an LO clock source 101 and a desired RF signal 111 are present. After the mixer, as shown in FIG. 1B, there are two signals, the desired “difference” signal 113 at IF and the undesired “sum” signal 114 at a much higher “image” frequency, (which would typically be removed with a Low-Pass Filter). The effects of phase noise on the LO clock source 102 are also shown, and result in spectral growth 115 and 116 of the RF signal at the mixer output. The LO Clock Source Phase Noise 102, when looked at on a PSD plot as in FIG. 1A, is all power present in the LO signal that is not in the pure tone at the desired frequency, and is usually expressed in the units dBc/Hz, i.e. the amount of power present in 1 Hz of bandwidth relative to the power of the LO tone.
In broadband applications such as telecommunication, Phase Noise is often expressed using terms such as Integrated RMS Jitter or Total Jitter, often measured in femtoseconds (fs) or picoseconds (ps). However in RF applications it is often more appropriate to talk about Phase Noise in dBc/Hz at certain frequency offsets, for example “−153 dBc/Hz at 800 kHz offset”. To understand why, FIG. 1C shows a frequency plan for a multi-carrier RF Receiver, where the desired signal 111 is present but at a much lower power than a second signal 121 (also known as a “Blocker”) in an adjacent carrier frequency. As before, after the mixer, as shown in FIG. 1D, the two output signals 113 and 114 from the desired RF channel are present, as are the two output signals 123 and 124 from the Blocker.
As before, Phase Noise 102 on the LO Clock Source results in spectral regrowth, however in the multi-carrier scenario the spectral regrowth 125 and 126 from the high-power blocker 121 appears in the IF band of the down-converted signal 113. Because it is impossible to remove this noise from the IF signal, this irreparably harms the Signal-to-Noise Ratio (SNR) of the down-converted signal, hence limiting the available information-carrying bandwidth of the RF Receiver in that channel. The spectral regrowth 115 of a single-carrier system is typically much less disruptive than the regrowth 125 in a multi-carrier system because the regrowth power in a single-carrier system is proportional to the signal power, whereas in multi-carrier system the regrowth power is proportional to the blocker's signal power, which depending upon a number of factors can be much higher.
Because multi-carrier RF Transmit systems are usually dealing with multiple RF signals of similar power, spectral regrowth concerns due to LO Phase Noise is often less of an issue than in multi-carrier RF Receive systems, but still should be considered.
Voltage controlled oscillators (VCOs) are electronic oscillators used in a number of electronic circuits. A VCO has a voltage input that controls the oscillation frequency. An LC VCO, is a VCO that includes a frequency-selective resonance tank made up of an inductor and a capacitor. In designing a low phase noise LC VCO, driver size can be reduced in order to improve driver signal-to-noise ratio (SNR). In many cases, driver noise dominates the phase noise. There is great deal of information known to those skilled in the art about minimizing LC VCO phase noise in general, and it is beyond the scope of this document to discuss this in great detail. However, without wishing to be bound by theory, the following discussion may be useful in illustrating some performance limits of LC VCOs in an Integrated Circuit (IC) environment.
An elementary Inductance/Capacitance Voltage-Controlled Oscillator (LC VCO) 200 is shown in FIG. 2A, and consists of a driver 204, an inductor 201, a fixed capacitor 203, and a voltage-tunable variable capacitor, or varactor 202, the capacitance of which is determined by the input Control Voltage. The driver 204 has a transconductance gain gm and provides sufficient gain in the loop to overcome the losses in the non-ideal inductance and capacitance elements and interconnections to ensure that the criteria for generating oscillations, known as Barkhausen criteria, are met. The inductor 201 and fixed capacitor 203 approximately set the natural resonant frequency of the VCO. By tuning the control voltage of the varactor 202 the frequency of the VCO can be fine-tuned; for example a phase-locked loop (PLL) circuit can be constructed to lock the VCO's output signal frequency and phase to the frequency and phase of a higher level input reference clock signal. The VCO 200 of FIG. 2A is relatively simple because it deploys a single resonant tank and a fixed driver element. Numerous techniques to minimize harmonic folding of noise contributors and to calibrate the driver strength to minimize the noise contribution of the driver are known to those skilled in the art.
The LC VCO 200 of FIG. 2A is one of the simplest possible configurations. However, it is useful to illustrate the performance limitations that are faced in an LC VCO that is implemented in a typical modern IC fabrication process. FIG. 2B shows a parallel RLC model 210 of the LC VCO of FIG. 2A. Inductance L and capacitance C set the oscillation frequency f0, while the shunt resistance R represents losses and determines the quality factor (Q factor, or Q) and oscillation swing (amplitude). According to equations 3-6:
                              ω          0                =                              2            ⁢            π            ⁢                                                  ⁢                          f              0                                =                      1                                          L                ⁢                                                                  ⁢                C                                                                        (                  Equation          ⁢                                          ⁢          3                )                                Q        =                              R                          L              ⁢                                                          ⁢                              ω                0                                              =                      R            ⁢                                                  ⁢            C            ⁢                                                  ⁢                          ω              0                                                          (                  Equation          ⁢                                          ⁢          4                )                                          v          ⁡                      (            t            )                          =                                            V              0                        ⁢            cos            ⁢                                                  ⁢                          (                                                ω                  0                                ⁢                t                            )                                =                      R            ⁢                                                  ⁢                          I              0                        ⁢            cos            ⁢                                                  ⁢                          (                                                ω                  0                                ⁢                t                            )                                                          (                  Equation          ⁢                                          ⁢          5                )                                          P          sig                =                                            V              0              2                                      2              ⁢                                                          ⁢              R                                =                                    R              ⁢                                                          ⁢                              I                0                2                                      2                                              (                  Equation          ⁢                                          ⁢          6                )            
where ω0 and f0 are oscillation frequency in radian/s and Hz, respectively, V0 is the peak of sinusoidal voltage oscillation across the tank, I0 is the peak of sinusoidal current out of the oscillator driver onto the tank, and Psig is the RMS power of the oscillation signal. In practice, to achieve the best phase noise performance, the oscillator needs to operate at the boundary of the voltage-limited regime and the current-limited regime where oscillation across the LC tank swings close to its maximal value V0,max while still remaining sinusoidal (without hard clipping).
Equation 7 shows the basic term of Leeson's equation that describes the power spectral density of an oscillator's phase noise due to thermal noise sources at offset Δf from carrier frequency f0,
                              L          ⁡                      (                          Δ              ⁢                                                          ⁢              f                        )                          =                  10          ⁢                                          ⁢                                    log              10                        ⁡                          [                                                                    2                    ⁢                                                                                  ⁢                    k                    ⁢                                                                                  ⁢                    T                                                        P                                          s                      ⁢                                                                                          ⁢                      t                      ⁢                                                                                          ⁢                      g                                                                      ⁢                                                      (                                                                  1                                                  2                          ⁢                                                                                                          ⁢                          Q                                                                    ⁢                                                                        f                          0                                                                          Δ                          ⁢                                                                                                          ⁢                          f                                                                                      )                                    2                                            ]                                                          (                  Equation          ⁢                                          ⁢          7                )            
where k is Boltzmann's constant, T is absolute temperature in Kelvins, Q is loaded quality factor of the tank, and L(Δf) is single-side-band (SSB) phase noise profile in dBc/Hz. The phase noise profile in this equation exhibits a slope of −6 dB/octave, or −20 dB/decade, vs. Δf and describes thermal noise region (a.k.a.
  1      f    2  region) of the oscillator up to the resonance bandwidth of
            f      0              2      ⁢                          ⁢      Q        .
Leeson's equation suggests that to improve phase noise, one would need to increase Q and/or the oscillation power Psig. Equation 7 applies only between flicker noise corner (i.e., corner of
  1      f    3  and
  1      f    2  regions) and
            f      0              2      ⁢                          ⁢      Q        ,above which a flat noise floor dominates. The equation was further modified by D. B. Leeson to account for several experimentally observed phenomena, including
  1      f    3  region and the flat noise floor region; nonetheless, the observations about increasing Q and the oscillation power Psig to improve the phase noise remain the same.
The first aspect to note here is that the phase noise performance that is achievable is limited by the quality factor Q, or in other words dissipative losses of the VCO's LC resonant tank, and there is a practical limit to the values of Q that are achievable in an integrated circuit (IC) LC tank. Generally speaking, in an integrated VCO the inductor is a dominant factor in limiting the tank Q factor, and the inductor Q can typically be maximized through minimizing the inductor value down to a certain practical limit. Therefore, in an integrated VCO design, one would first realize an inductor that maximizes Q at the desired frequency of oscillation.
For a given oscillation frequency, the phase noise of an LC oscillator can be improved by (10×log10N) in decibel units (dB) by decreasing the inductance (L) by N times and increasing the capacitance (C) by N times and consuming more power by N times. If the RLC tank's impedance is scaled by 1/N, the values of R, L and C are replaced by R/N, UN and NC, respectively. In this case, according to equations 3-4, the oscillation frequency and quality factor remain intact. Moreover, based on equations 5-6, to maintain the desired maximal signal swing V0,max, the oscillator driver output current would need to scale up from I0 to NI0 (e.g., by implementing N identical drivers in parallel), which implies the signal power is increased from Psig to NPsig. If the impedance scaling is applied on individual lumped components, in the limit of this approach, the physical shape of a very small inductor becomes very hard to model and predict accurately prior to fabrication. Also, pushing the scaled-up current of NI0 through a single inductor can eventually exceed electro-migration (EM) limits of metal traces and cause reliability and thermal issues.
In essence, the LC tank's Q factor can be improved up to a limit, but at some point the inductance and the Q factor become too challenging to model and predict, and other implementation issues will arise. LC tanks need to be predictable to minimize costly revisions of integrated circuit designs and to enable designers to re-center existing VCO designs to nearby frequencies for alternative applications with high confidence. The performance limitations are experienced when the physical characteristics of the inductor are at the threshold of being practically impossible to model with sufficient accuracy.
Another approach to the impedance scaling is to implement N resonance RLC tanks in parallel. This approach, known as multi-core VCO, or array VCO, can provide further oscillator phase noise improvement. Placing inductors in parallel effectively reduces total inductance and improves phase noise, without requiring unreliably low individual inductances. Such a configuration is useful when a modeling limit or parasitics limit is reached in the design of an individual LC VCO.
For example, FIG. 3 shows an example array 300 of multiple LC VCOs 301, 302, 303 connected to provide the outputs of individual LC VCOs to an averaging circuit 304 so that the output signal from the averaging circuit 304, which is the average of the individual outputs of the first to Nth VCO elements 301, 302, 303 in the array 300, can be used as the overall oscillator output signal. Because the noise of each array element is uncorrelated from the others but the signals of the VCO elements in the array can be correlated, the SNR of the average output signal of the array of VCO elements can be higher than the SNR of an individual VCO element's signal, hence the phase noise can be improved in the VCO array.
While the array elements may be designed to have same characteristics, in any real device the individual elements will generally not have completely identical characteristics, as discussed further below. FIG. 4A illustrates a known LC VCO array with matched circuits, and FIG. 4B illustrates a known LC VCO array with mismatched circuits. If VCO elements are matched, ideally no current flows through interconnects between LC tanks. However, mismatched LC VCO characteristics will cause current to flow through interconnects of the array, as shown in FIGS. 4A and 4B. Such currents cause power dissipation and degrade phase noise, which is undesirable. For example, current flowing through an interconnect degrades phase noise, because the interconnect between large physical LC VCO structures will be resistive. The impedance of the interconnect and the magnitude of mismatch between VCOs introduces a practical limit to VCO array size.
Current state of the art of design techniques used in building an array of LC VCOs to generate high performance clock signals in an integrated circuit is represented by the following public domain publications, incorporated by reference in their entirety:
US Patent Application Publication No. US2013/300470 to Mohajeri, entitled Low Jitter Clock Generator for Multiple Lanes High Speed Data Transmitter;
Luca Romano, Andrea Bonfanti et al., IEEE Journal of Solid-State Circuits, November 2006: 5-GHz Oscillator Array With Reduced Flicker Up-Conversion in 0.13-μm CMOS; 
Dorra Mellouli, David Cordeau et al., Springer-Analog Integrated Circuits and Signal Processing, August 2013: Design and Implementation of A 6-GHz Array of Four Differential VCOs Coupled Through a Resistive Network; 
Zhiming Deng and Ali M. Niknejad, IEEE Journal of Solid-State Circuits, August 2011: A 4-Port-Inductor-Based VCO Coupling Phase Noise Reduction. 
The inventors have determined that improvements in matching of VCOs and their control are desirable.